Package | TSOP2(44/50) |
Outpack | |
RoHS | Leaded |
Voltage | 5.0 V |
Temperature | 0 C~+70 C |
Speed | 50 NS |
Std. Pack Qty | |
Std. Carton |
GENERAL DESCRIPTION The 1 Meg x 16 DRAM is a randomly accessed, solidstate memory containing 16,777,216 bits organized in a x16 configuration. The 1 Meg x 16 DRAM has both BYTE WRITE and WORD WRITE access cycles via two CAS# pins (CASL# and CASH#). These function identically to a single CAS# on other DRAMs in that either CASL# or CASH# will generate an internal CAS#.
Description | Qty | Datecode | |
---|---|---|---|
MT4C1M16C3TG-5T | 4,000 | 00+ | Get Quote |
Description | Package | Voltage | Speed | Temperature |
---|---|---|---|---|
AS4C1M16F5-50TC | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
GM71C16160BT-5 | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
GM71C16160CT-5 | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
GM71C18160CT-5 | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
GM71C18160CT-50 | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
HM5116160LTT5 | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
HM5118160LTT-5 | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
HM5118160TT-5 | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
MT4C1M16C3TG-5 | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |
MT4C1M16C3TG-5S | TSOP2(44/50) | 5.0 V | 50 NS | 0 C~+70 C |