HY29LV160BT-90

GENERAL DESCRIPTION The HY29LV160 is a 16 Mbit, 3 volt-only, CMOS Flash memory organized as 2,097,152 (2M) bytes or 1,048,576 (1M) words that is available in 48pin TSOP and 48-ball FBGA packages. Wordwide data (x16) appears on DQ[15:0] and bytewide (x8) data appears on DQ[7:0]. The HY29LV160 can be programmed and erased in-system with a single 3 volt VCC supply. Internally generated and regulated voltages are provided for program and erase operations, so that the device does not require a higher voltage VPP power supply to perform those functions. The device can also be programmed in standard EPROM programmers. Access times as low as 80 ns over the full operating voltage range of 2.7 - 3.6 volts, and 70 ns with a limited voltage range of 3.0 - 3.6 volts, are offered for timing compatibility with the zero wait state requirements of high speed microprocessors. To eliminate bus contention, the HY29LV160 has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device is compatible with the JEDEC singlepower-supply Flash memory command set standard. Commands are written to the command register using standard microprocessor write timings. They are then routed to an internal state-machine that controls the erase and programming circuits. Device programming is performed a byte/word at a time by executing the four-cycle Program Command write sequence. This initiates an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. Faster programming times can be achieved by placing the HY29LV160 in the Unlock Bypass mode, which requires only two write cycles to program data instead of four. The HY29LV160’s sector erase architecture allows any number of array sectors to be erased and reprogrammed without affecting the data contents of other sectors. Device erasure is initiated by executing the Erase Command sequence. This initiates an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. As during programming cycles, the device automatically times the erase pulse widths and verifies proper cell margin.